*********************************************************** * * BSP61 * * Nexperia * * Darlington PNP Transistor * IC = 1 A * VCEO = 80 V * hFE = min. 2000 @ 10V/500mA * * * * * Package pinning does not match Spice model pinning. * Package: SOT 223 * * Package Pin 1: Base * Package Pin 2: Collector * Package Pin 3: Emitter * Package Pin 4: Collector * * # * Spicemodel does not include temperature dependency * ********************************************************** *# * .SUBCKT BSP61 1 2 3 Q1 1 2 33 BSP61 1 Q2 1 33 3 BSP61 3.33 R1 33 3 50 D1 1 3 DIODE * * For simulation of large signal * switching please edit * the model and replace * R1 = 50 by R1 = 100 * .MODEL BSP61 PNP + IS = 1.001E-14 + NF = 0.976 + ISE = 1E-15 + NE = 2.332 + BF = 172.5 + IKF = 0.4163 + VAF = 70 + NR = 0.9748 + ISC = 1.782E-15 + NC = 1.06 + BR = 10.12 + IKR = 0.005 + VAR = 10 + RB = 77.4 + IRB = 2.05E-05 + RBM = 0.001 + RE = 0.3607 + RC = 3.399 + XTB = 0 + EG = 1.11 + XTI = 3 + CJE = 2.4E-11 + VJE = 0.7005 + MJE = 0.3739 + TF = 1E-09 + XTF = 2 + VTF = 5 + ITF = 5 + PTF = 0 + CJC = 9.199E-12 + VJC = 0.446 + MJC = 0.3962 + XCJC = 1 + TR = 9E-07 + CJS = 0 + VJS = 0.75 + MJS = 0.333 + FC = 0.78 .MODEL DIODE D + IS = 1E-18 + N = 0.6777 + BV = 86 + IBV = 1E-09 + RS = 8 + CJO = 5E-14 + VJ = 0.446 + M = 0.396 + FC = 0.5 + TT = 0 + EG = 1.11 + XTI = 3 .ENDS *